Back
Job   UK   Edinburgh   Edinburgh Area   Engineer   Verilab -

Design Verification Engineer (UK) | Engineer in Engineering Job at Verilab in Edinburgh EDH | 71231

This listing was posted on The Resumator.

Design Verification Engineer (UK)

Location:
Edinburgh, Edinburgh
Description:

Job Summary We invite you to join our highly motivated team of consultants, providing clients with the very best in verification. You will be exposed to a diverse range of designs and application areas. We work on leading edge Audio, Automotive, Comms, Processors, Space, Video and more.You will have the opportunity to travel, present at conferences, win Best Paper awards, or get involved with industry standards. We do it all. In addition to being good, we like to be seen to be good.As a permanent full-time employee of Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly involved with helping build and grow client relationships.You will be working alongside some of the smartest people in the industry. Verilab is a company where your skills will be tested, nurtured, and where your contribution makes a difference.*** Relocation not required - flexibility to work from other UK locations *** Key Qualifications BSc/MSc in Electronic Engineering, Computer Engineering, or Computer Science. 7 years of project-proven verification experience. Experienced SystemVerilog/UVM developer: Block and integration-level Coverage-driven, self-checking verification environments from scratch High-level sequence-based stimulus Complex transaction-based checkers (e.g. scoreboards with data translation and ordering) Register models Specification level checks for several different protocols, e.g. AXI, DDRx, PCIe, USBx. Verification planning: Requirements capture and traceability Estimation, prioritizing Metrics used to determine verification closure Ownership of work, from planning to implementation. Experience dealing directly with strict deadlines and technical challenges. Effective communication and collaboration with others. Other Interesting Qualifications Specman/e expertise to a similar level. C/C++ developing, or integrating, reference models into SystemVerilog/UVM environments. Formal Verification: Formal Property Verification, Proof Kits. Experience leading a technical team, including mentoring, training, and performing technical peer reviews. Embedded programming for ARM, or GPU processors. Python or Perl. Verilab is an established international professional services firm of verification experts. Founded in 2000, we specialize in solving the toughest functional verification problems for ASIC, FPGA and independent IP development. Our work ranges from rescuing projects struggling with verification, through sophisticated verification IP development, to complete methodology engineering. We innovate, implement, manage and coach. Benefits Full-time permanent employee with competitive salary. Company-sponsored pension. Medical cover. Life insurance. Income protection. 26 days paid holidays, plus statutory days. Eligibility for bonuses. Birthday gifts. Book budget. Leading industry career and personal development training. Additional Requirements All candidates must be eligible to work in the UK. The ability to travel is required. Powered by JazzHR
Company:
Verilab
Posted:
January 1 on The Resumator
Visit Our Partner Website
This listing was posted on another website. Click here to open: Go to The Resumator
Important Safety Tips
  • Always meet the employer in person.
  • Avoid sharing sensitive personal and financial information.
  • Avoid employment offers that require a deposit or investment.

To learn more, visit the Safety Center or click here to report this listing.

More About this Listing: Design Verification Engineer (UK)
Design Verification Engineer (UK) is a Engineering Engineer Job at Verilab located in Edinburgh EDH. Find other listings like Design Verification Engineer (UK) by searching Oodle for Engineering Engineer Jobs.